1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same.
2. Description of the Related Art
Japanese Patent Laid-Open No. 2004-111866 discloses a method for manufacturing a semiconductor device by connecting a plurality of patterns to each other by divided exposure so as to form a single-layered pattern. In this manufacturing method, instead of divided exposure, one-shot exposure is used to form a pattern in a layer including a wiring line which exerts a substantial influence on the operation of the semiconductor device depending on the positional relationship with other wiring lines. Japanese Patent Laid-Open No. 2003-248329 discloses divided exposure performed four times while alignment is performed using alignment marks, which are formed on a glass substrate by one-shot exposure using a photomask for forming them.
Japanese Patent Laid-Open No. 2004-111866 neither discloses nor suggests the arrangement of alignment marks used to align masks for divided exposure with respect to the pattern of a layer formed by one-shot exposure. In this case, when one alignment mark is formed in forming a layer by one-shot exposure, high overlay accuracy can be obtained in divided exposure of a region close to this alignment mark. However, it is difficult to obtain high overlay accuracy in divided exposure of a region far from that alignment mark due, for example, to a magnification error and distortion of a projection optical system of an exposure apparatus, expansion/contraction of a substrate, or a driving error of a stage apparatus which positions the substrate.
In the method described in Japanese Patent Laid-Open No. 2003-248329, a photomask for forming alignment marks includes no circuit pattern, so a photolithography step for forming only alignment marks is indispensable, thus increasing the number of steps.